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1

[IEEE The IEEE International Symposium on Circuits and Systems, 2003. Tutorial Guide: ISCAS 2003. - Bangkok, Thailand (25-28 May, 2003)] The IEEE International Symposium on Circuits and Systems, 2003. Tutorial Guide: ISCAS 2003. - High-performance design techniques in nanometer integrated circuits

Roy, F.K., Sapatnekar, S.S., Secareanu, R., Ismail, Y.I.

Year:

2003

Language:

english

File:

PDF, 11.25 MB

english, 2003

2

[IEEE 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE) - Grenoble, France (2020.3.9-2020.3.13)] 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE) - GANA: Graph Convolutional Network Based Automated Netlist Annotation for Analog Circuits

Kunal, Kishor, Dhar, Tonmoy, Madhusudan, Meghna, Poojary, Jitesh, Sharma, Arvind, Xu, Wenbin, Burns, Steven M., Hu, Jiang, Harjani, Ramesh, Sapatnekar, Sachin S.

Year:

2020

File:

PDF, 1.32 MB

2020

3

Overcoming Variations in Nanometer-Scale Technologies

Sapatnekar, S.S.

Journal:

IEEE Journal on Emerging and Selected Topics in Circuits and Systems

Year:

2011

Language:

english

File:

PDF, 848 KB

english, 2011

4

Technology Mapping Using Logical Effort for Solving the Load-Distribution Problem

Karandikar, S.K., Sapatnekar, S.S.

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2008

Language:

english

File:

PDF, 466 KB

english, 2008

5

[IEEE Computer Soc Proceedings. 18th International Conference on VLSI Design - Kolkata, India (3-7 Jan. 2005)] 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design - High-speed interconnect technology: on-chip and off-chip

Sapatnekar, S., Roychowdhury, J., Harjani, R.

Year:

2005

Language:

english

File:

PDF, 32 KB

english, 2005

6

Analysis and optimization of structured power/ground networks

Haihua Su, Gala, K.H., Sapatnekar, S.S.

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2003

Language:

english

File:

PDF, 725 KB

english, 2003

7

Steiner tree optimization for buffers, blockages, and bays

Alpert, C.J., Gandham, G., Jiang Hu, Neves, J.I., Quay, S.T., Sapatnekar, S.S.

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2001

Language:

english

File:

PDF, 408 KB

english, 2001

8

Exact and efficient crosstalk estimation

Kuhlmann, M., Sapatnekar, S.S.

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2001

Language:

english

File:

PDF, 216 KB

english, 2001

9

[IEEE 2011 IEEE Custom Integrated Circuits Conference - CICC 2011 - San Jose, CA, USA (2011.09.19-2011.09.21)] 2011 IEEE Custom Integrated Circuits Conference (CICC) - Exploration of on-chip switched-capacitor DC-DC converter for multicore processors using a distributed power delivery network

Zhou, Pingqiang, Jiao, Dong, Kim, Chris H., Sapatnekar, Sachin S.

Year:

2011

Language:

english

File:

PDF, 448 KB

english, 2011

10

[IEEE 2013 IEEE Asian Solid-State Circuits Conference (A-SSCC) - Singapore, Singapore (2013.11.11-2013.11.13)] 2013 IEEE Asian Solid-State Circuits Conference (A-SSCC) - Deep trench capacitor based step-up and step-down DC/DC converters in 32nm SOI with opportunistic current borrowing and fast DVFS capabilities

Paul, Ayan, Jiao, Dong, Sapatnekar, Sachin, Kim, Chris H.

Year:

2013

Language:

english

File:

PDF, 578 KB

english, 2013

11

[IEEE Comput. Soc. Press International Conference on Computer Aided Design - San Jose, CA, USA (10-14 Nov. 1996)] Proceedings of International Conference on Computer Aided Design - Clock tree synthesis for multi-chip modules

Lehther, D., Sapatnekar, S.S.

Year:

1996

Language:

english

File:

PDF, 422 KB

english, 1996

12

A Finite-Oxide Thickness-Based Analytical Model for Negative Bias Temperature Instability

Kumar, S.V., Kim, C.H., Sapatnekar, S.S.

Journal:

IEEE Transactions on Device and Materials Reliability

Year:

2009

Language:

english

File:

PDF, 1.13 MB

english, 2009

13

[IEEE ICCAD 2004. International Conference on Computer Aided Design - San Jose, CA, USA (7-11 Nov. 2004)] IEEE/ACM International Conference on Computer Aided Design, 2004. ICCAD-2004. - Logical effort based technology mapping

Karandikar, S.K., Sapatnekar, S.S.

Year:

2004

Language:

english

File:

PDF, 322 KB

english, 2004

14

Analysis and optimization of power grids

Sapatnekar, S.S., Haihua Su,

Journal:

IEEE Design & Test of Computers

Year:

2003

Language:

english

File:

PDF, 370 KB

english, 2003

15

[IEEE ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems - Sydney, NSW, Australia (6-9 May 2001)] ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196) - Steiner tree optimization for buffers. Blockages and bays

Alpert, C.J., Gandham, G., Hu, J., Neves, J.L., Quay, S.T., Sapatnekar, S.S.

Year:

2001

Language:

english

File:

PDF, 556 KB

english, 2001

16

The Impact of BTI Variations on Timing in Digital Logic Circuits

Fang, Jianxin, Sapatnekar, Sachin S.

Journal:

IEEE Transactions on Device and Materials Reliability

Year:

2013

Language:

english

File:

PDF, 829 KB

english, 2013

17

Design closure with cell-based synthesis

Carpenter, C., McLellan, P., Murgai, R., Nikolic, B.B., Sohail, F., Sapatnekar, S., Roy, K.

Journal:

IEEE Design & Test of Computers

Year:

2001

Language:

english

File:

PDF, 188 KB

english, 2001

18

[IEEE 2012 IEEE Custom Integrated Circuits Conference - CICC 2012 - San Jose, CA, USA (2012.09.9-2012.09.12)] Proceedings of the IEEE 2012 Custom Integrated Circuits Conference - Staggered Core Activation: A circuit/architectural approach for mitigating resonant supply noise issues in multi-core multi-power domain processors

Paul, Ayan, Amrein, Matt, Gupta, Saket, Vinod, Arvind, Arun, Abhishek, Sapatnekar, Sachin, Kim, Chris H.

Year:

2012

Language:

english

File:

PDF, 1.45 MB

english, 2012

19

Spin-Based Computing: Device Concepts, Current Status, and a Case Study on a High-Performance Microprocessor

Jongyeon Kim,, Paul, Ayan, Crowell, Paul A., Koester, Steven J., Sapatnekar, Sachin S., Jian-Ping Wang,, Kim, Chris H.

Journal:

Proceedings of the IEEE

Year:

2015

Language:

english

File:

PDF, 5.24 MB

english, 2015

20

[IEEE 2005 IEEE International Symposium on Circuits and Systems - Kobe, Japan (23-26 May 2005)] 2005 IEEE International Symposium on Circuits and Systems - Designing optimized pipelined global interconnects: Algorithms and methodology impact

Nookala, V., Sapatnekar, S.S.

Year:

2005

Language:

english

File:

PDF, 109 KB

english, 2005

21

[IEEE 2010 11th International Symposium on Quality of Electronic Design (ISQED) - San Jose, CA, USA (2010.03.22-2010.03.24)] 2010 11th International Symposium on Quality Electronic Design (ISQED) - Scalable methods for the analysis and optimization of gate oxide breakdown

Jianxin Fang,, Sapatnekar, Sachin S.

Year:

2010

Language:

english

File:

PDF, 251 KB

english, 2010

22

[IEEE 2005 IEEE International Symposium on Circuits and Systems - Kobe, Japan (23-26 May 2005)] 2005 IEEE International Symposium on Circuits and Systems - Fast Estimation of Area-Delay Trade-offs in Circuit Sizing

Karandikar, S.K., Sapatnekar, S.S.

Year:

2005

Language:

english

File:

PDF, 164 KB

english, 2005

23

[Integrated Circuits and Systems] Three Dimensional Integrated Circuit Design || Thermal and Power Delivery Challenges in 3D ICs

Xie, Yuan, Cong, Jason, Sapatnekar, Sachin

Year:

2010

Language:

english

File:

PDF, 1.06 MB

english, 2010

24

[Presses Polytech. Univ. Romandes ISCAS 2000 Geneva. 2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings - Geneva, Switzerland (28-31 May 2000)] 2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353) - Dual-monotonic domino gate mapping and optimal output phase assignment of domino logic

Min Zhao,, Sapatnekar, S.S.

Year:

2000

Language:

english

File:

PDF, 402 KB

english, 2000

25

[ACM Press the 54th Annual Design Automation Conference 2017 - Austin, TX, USA (2017.06.18-2017.06.22)] Proceedings of the 54th Annual Design Automation Conference 2017 on - DAC '17 - A Pathway to Enable Exponential Scaling for the Beyond-CMOS Era

Wang, Jian-Ping, Niemier, Michael, Naeemi, Azad, Chien, Chia-Ling, Ross, Caroline, Kawakami, Roland, Sapatnekar, Sachin S., Kim, Chris H., Crowell, Paul, Koester, Steve, Datta, Supriyo, Roy, Kaushik,

Year:

2017

Language:

english

File:

PDF, 1.43 MB

english, 2017

26

A Simple Yet Efficient Accuracy-Configurable Adder Design

Xu, Wenbin, Sapatnekar, Sachin S., Hu, Jiang

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

2018

Language:

english

File:

PDF, 8.41 MB

english, 2018

27

In-Memory Processing on the Spintronic CRAM: From Hardware Design to Application Mapping

Zabihi, Masoud, Chowdhury, Zamshed, Zhao, Zhengyang, Karpuzcu, Ulya R., Wang, Jian-Ping, Sapatnekar, Sachin

Journal:

IEEE Transactions on Computers

Year:

2018

Language:

english

File:

PDF, 9.37 MB

english, 2018

28

[IEEE 2019 20th International Symposium on Quality Electronic Design (ISQED) - Santa Clara, CA, USA (2019.3.6-2019.3.7)] 20th International Symposium on Quality Electronic Design (ISQED) - Impact of Self-heating on Performance and Reliability in FinFET and GAAFET Designs

Chhabria, Vidya A., Sapatnekar, Sachin S.

Year:

2019

Language:

english

File:

PDF, 1.60 MB

english, 2019

29

[ACM Press the 56th Annual Design Automation Conference 2019 - Las Vegas, NV, USA (2019.06.02-2019.06.06)] Proceedings of the 56th Annual Design Automation Conference 2019 on - DAC '19 - Toward an Open-Source Digital Flow

Ajayi, Tutu, Neseem, Marina, Pradipta, Geraldo, Reda, Sherief, Saligane, Mehdi, Sapatnekar, Sachin S., Sechen, Carl, Shalan, Mohamed, Swartz, William, Wang, Lutong, Wang, Zhehong, Chhabria, Vidya A.,

Year:

2019

File:

PDF, 381 KB

2019

30

[IEEE 2020 25th Asia and South Pacific Design Automation Conference (ASP-DAC) - Beijing, China (2020.1.13-2020.1.16)] 2020 25th Asia and South Pacific Design Automation Conference (ASP-DAC) - Template-based PDN Synthesis in Floorplan and Placement Using Classifier and CNN Techniques

Chhabria, Vidya A., Kahng, Andrew B., Kim, Minsoo, Mallappa, Uday, Sapatnekar, Sachin S., Xu, Bangqi

Year:

2020

File:

PDF, 1.12 MB

2020

31

Complement-mediated leukocyte adhesion on poly(etherurethane ureas) under shear stress in vitro

Weiyuan John Kao, Suneeti Sapatnekar, Anne Hiltner, James M. Anderson

Journal:

Journal of Biomedical Materials Research Part B: Applied Biomaterials

Year:

1996

Language:

english

File:

PDF, 1.15 MB

english, 1996

32

Leukocyte—biomaterial interactions in the presence of Staphylococcus epidermidis: Flow cytometric evaluation of leukocyte activation (Student Research Award in the Hospital Intern, Resident, or Clinical Fellow Category, 23rd Annual Meeting of the Society for Biomaterials, New Orleans, LA, April 30–May 4, 1997)

Suneeti Sapatnekar, W. John Kao, James M. Anderson

Journal:

Journal of Biomedical Materials Research Part B: Applied Biomaterials

Year:

1997

Language:

english

File:

PDF, 232 KB

english, 1997

33

Blood–biomaterial interactions in a flow system in the presence of bacteria: Effect of protein adsorption

Suneeti Sapatnekar, Kristine M. Kieswetter, Katharine Merritt, James M. Anderson, Linda Cahalan, Michel Verhoeven, Marc Hendriks, Benedicte Fouache, Patrick Cahalan

Journal:

Journal of Biomedical Materials Research Part B: Applied Biomaterials

Year:

1995

Language:

english

File:

PDF, 1014 KB

english, 1995

34

Bacteria/blood/material interactions. I. Injected and preseeded slime-forming Staphylococcus epidermidis in flowing blood with biomaterials

M. R. Brunstedt, S. Sapatnekar, K. R. Rubin, K. M. Kieswetter, N. P. Ziats, K. Merritt, J. M. Anderson

Journal:

Journal of Biomedical Materials Research Part B: Applied Biomaterials

Year:

1995

Language:

english

File:

PDF, 1.24 MB

english, 1995

35

Acute hemolytic transfusion reaction in a pediatric patient following transfusion of apheresis platelets

Suneeti Sapatnekar, Girish Sharma, Katharine A. Downes, Susan Wiersma, Claire McGrath, Roslyn Yomtovían

Journal:

Journal of Clinical Apheresis

Year:

2005

Language:

english

File:

PDF, 76 KB

english, 2005

36

A survey on multi-net global routing for integrated circuits

Jiang Hu, Sachin S. Sapatnekar

Journal:

Integration, the VLSI Journal

Year:

2001

Language:

english

File:

PDF, 472 KB

english, 2001

37

Probability-driven routing in a datapath environment

Suresh Raman, Sachin S. Sapatnekar, Charles J. Alpert

Journal:

Integration, the VLSI Journal

Year:

2002

Language:

english

File:

PDF, 557 KB

english, 2002

38

Methicillin-resistant Staphylococcus aureus sepsis associated with the transfusion of contaminated platelets: a case report

Suneeti Sapatnekar, Erica M. Wood, John P. Miller, Michael R. Jacobs, Matthew J. Arduino, Sigrid K. McAllister, Molly E. Kellum, Virginia Roth, Roslyn Yomtovian

Journal:

Transfusion (Wiley)

Year:

2001

Language:

english

File:

PDF, 62 KB

english, 2001

39

Buffering global interconnects in structured ASIC design

Tianpei Zhang, Sachin S. Sapatnekar

Journal:

Integration, the VLSI Journal

Year:

2008

Language:

english

File:

PDF, 529 KB

english, 2008

40

Retiming control logic

Naresh Maheshwari, Sachin S. Sapatnekar

Journal:

Integration, the VLSI Journal

Year:

1999

Language:

english

File:

PDF, 301 KB

english, 1999

41

Bacterial contamination of whole blood–derived platelets: the introduction of sample diversion and prestorage pooling with culture testing in the American Red Cross

Richard J. Benjamin, Linda Kline, Beth A. Dy, Jean Kennedy, Patricia Pisciotto, Suneeti Sapatnekar, Rachel Mercado, Anne F. Eder

Journal:

Transfusion (Wiley)

Year:

2008

Language:

english

File:

PDF, 97 KB

english, 2008

42

[IEEE Asia and South Pacific Conference on Design Automation, 2006. - Yokohama, Japan (Jan. 24, 2006)] Asia and South Pacific Conference on Design Automation, 2006. - Electrothermal analysis and optimization techniques for nanoscale integrated circuits

Yong Zhan,, Goplen, B., Sapatnekar, S.S.

Year:

2006

Language:

english

File:

PDF, 236 KB

english, 2006

43

Expression of HLA-DR antigens in inflammatory bowel disease mucosa: Role of intestinal lamina propria mononuclear cell-derived interferon γ

Qin Ouyang, Mounif El-Youssef, Belinda Yen-Lieberman, Wanda Sapatnekar, Kenneth R. Youngman, Kazuo Kusugami, Claudio Fiocchi

Journal:

Digestive Diseases and Sciences

Year:

1988

Language:

english

File:

PDF, 930 KB

english, 1988

44

Interferon γ production by human intestinal mucosal mononuclear cells

Belinda Y. Lieberman, Claudio Fiocchi, Kenneth R. Youngman, Wanda K. Sapatnekar, Max R. Proffitt

Journal:

Digestive Diseases and Sciences

Year:

1988

Language:

english

File:

PDF, 840 KB

english, 1988

45

Surface-bound heparin fails to reduce thrombin formation during clinical cardiopulmonary bypass

Robert C. Gorman, Nicholas P. Ziats, A.Koneti Rao, Nicolas Gikakis, Ling Sun, Mohammed M.H. Khan, Nina Stenach, Suneeti Sapatnekar, Vibhuti Chouhan, Joseph H. Gorman III, Stefan Niewiarowski, Robert W

Journal:

The Journal of Thoracic and Cardiovascular Surgery

Year:

1996

Language:

english

File:

PDF, 1.12 MB

english, 1996

46

Editorial

Sapatnekar, S. S.

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2012

Language:

english

File:

PDF, 44 KB

english, 2012

47

Scalable Methods for Analyzing the Circuit Failure Probability Due to Gate Oxide Breakdown

Fang, J., Sapatnekar, S. S.

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

2012

Language:

english

File:

PDF, 2.72 MB

english, 2012

48

[IEEE ISLPED'06 2006 International Symposium on Low Power Electronics and Design - Tegernsee, Germany (2006.10.4-2006.10.6)] ISLPED'06 Proceedings of the 2006 International Symposium on Low Power Electronics and Design - Temperature-Aware Floorplanning of Microarchitecture Blocks with IPC-Power Dependence Modeling and Transient Analysis

Nookala, Vidyasagar, Lilja, David J., Sapatnekar, Sachin S.

Year:

2006

Language:

english

File:

PDF, 4.72 MB

english, 2006

49

Guest Editorial

Sapatnekar, S. S.

Journal:

IEEE Journal on Emerging and Selected Topics in Circuits and Systems

Year:

2011

Language:

english

File:

PDF, 125 KB

english, 2011

50

A methodology for the simultaneous design of supply and signal networks

Haihua Su, Jiang Hu, Sapatnekar, S.S., Nassif, S.R.

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2004

Language:

english

File:

PDF, 760 KB

english, 2004